8086 microprocessor

By | April 26, 2019

8086 microprocessor:

     Points to be noted:

  •     It is a 16-bit microprocessor
  •     It has 20-bit of an address bus and 16-bit of the data bus
  •     It supports pipelining
  •     It can access up to 1 MB
  •     It can access 216=65536 i/o devices
  •     It supports integer decimal and ASCII also
  •     It can operate in two mode
  •     It is a family of x-86
  •     It has two blocks EU & IU
  •    8086 has an instruction queue
  •    It supports multiprocessing
  •    Its memory space is segmented

The 8086 is a 16-bit microprocessor. This statement implies that its arithmetic logic unit, its internal registers, and most of its instructions are intended to work with 16-bit binary data. The 8086 microprocessor has a 16-bit data bus, so it can read and write data to memory and ports either 16 bits or 8 bits at a time. The 8086 microprocessor has a 20-bit address bus so it can address any one of 220, or 1,048,576 memory locations.

The CPU of 8086 is divided into 2 independent functional parts to speed up the processing namely BIU (Bus interface unit) & EU (execution unit).

BIU:  

It handles all transfers of data and addresses on the buses for the execution unit.

  • Sends out addresses
  • Fetches instructions from memory
  • R/W data from or to ports and memory i.e handles all transfers of data and addresses on the busses

EU:

  • Tells bus interface unit where to fetch instructions or data from
  • Decodes instructions
  • Executes instructions
8086 microprocessor architecture

                         Fig: a block diagram of 8086 microprocessor

Bus interface unit:

The bus interface unit is further divided into the following component

     1.     The Queue:

When EU is decoding or executing an instruction, the bus will be free at that time. BIU pre-fetches up to 6-instructions bytes to be executed and places them in QUEUE. This improves the overall speed because in each time of execution of new instruction, instead of sending the address of next instruction to be executed to the system memory and waiting from the memory to send back the instruction byte, EU just picks up the fetched instruction byte from the QUEUE.

The bus interface unit(BIU) stores these pre-fetched bytes in a first-in-first-out (FIFO) register set known as a queue. Fetching the next instruction while the current instruction being executed is called pipelining.

     2.     Segment registers:

The BIU carry a dedicated address, which is used to produce the 20-bit address. The bus control logic of the bus interface unit(BIU) generates all the bus control signals, such as the R/W signals, for memory and I/O. The BIU also has four 16 bit segments registers which are:

  • Code segment: code segment holds the upper 16-bits of the starting addresses of the segment from which BIU is currently fetching instruction code bytes.
  •     Stack segment: Stack segment store addresses and data while subprogram executes
  •     Extra segment: store upper 16-bit s of starting addresses of two memory segments that are used for data.
  •     Data segment: store upper 16-bit s of starting addresses of two memory segments that are used for data.

      3.     Instruction pointer:

It is a 16-bit register that keeps the address of memory location of coming instruction to be executed

    4.     Stack Segment Register (SS) and Stack Pointer (SP):

The stack is a section of any memory device to store addresses and data while a subprogram is progressing. The stack segment(SS) register points to the current stack. The 20-bit physical stack address is calculated from the Stack Segment and Stack Pointer. The programmer also can use Base Pointer (BP) instead of SP for addressing. In this case, the 20-bit physical address is calculated with the help of SS and BP.

Execution unit

     1.     Instruction Decoder & ALU:

A decoder in the EU translates instructions fetched from the memory into a series of actions which the EU carries out.16-bit ALU in the EU performs actions such as AND, OR, XOR, increment, decrement etc.

     2.     FLAG  Register:

The 8086 has 9, 1-bit flags out of nine six are status and three are control flags the control bits in the flag register can be set or reset by the programmer

There are total 16 flags each 1 bit but 7 of them are unused

XXXXOFDFIFTFSFZFXAFXPFXCY

Control flags:

They are set using specific instructions and are used to control certain operations of the processor.

  •     TF (Trap flag): TF is used for single stepping through the program
  •     IF (Interrupt flag): IF is used to allow or prohibit the interruption of a program
  •     DF (Direction flag): DF is Used with string instructions

Status flags:

These flags are set or reset by the Execution unit by the results of some arithmetic or logic operation. 8086 microprocessor instructions check these flags to determine which of two alternative actions should be done in executing the instructions.

  •    OF (Overflow flag): Overflow flag is set if there is an arithmetic overflow, i.e. the size of the result exceeds the capacity of the destination location.
  •    SF (Sign flag): Sign flag is set if the MSB of the result is 1
  •    ZF (Zero flag): Zero flag is set if the result is zero
  •    AF (Aux carry flag): Aux carry flag is set if there is carry from lower nibble to upper nibble or from lower byte to upper byte
  •    PF (Parity flag): Parity flag is set if the result has even parity
  •    CF (Carry flag): Carry flag is set if there is carry from the addition or borrow from the subtraction

     3.     General purpose register:

  • 8 General purpose registers AH, AL (Accumulator), BH, BL, CH, CL, DH, DL are used to store 8-bit data.
  • AL register is also called the accumulator
  • They are used individually for the temporary storage of data
  • Two GPRs can be used together as a register pair to store 16-bit data words. Acceptable register pairs are:

                AH-AL pair AX register              BH-BL pair BX register

                CH-CL pair CX register               DH-DL pair DX register

4. Pointer and Index registers: 

SP (Stack Pointer), BP (Base pointer),                       

SI(Source Index), DI (Destination index)

The two pointer registers, stack pointer and base pointer are used to access data in the stack segment. The Stack pointer is used as an offset from current Stack Segment during execution of an instruction that involves stack. The stack pointer is automatically updated. base pointer(BP) contains offset address and is utilized in based addressing mode.

      Index registers:

EU also contains a 16-bit source index (SI) register and 16-bit destination index (DI) register. These three registers can be used for temporary storage of data similarly as the general purpose registers. However, they are mainly used to hold the 16-bit offset of the data word.

difference between 8085 and 8086 microprocessor

8085 microprocessor 8086 microprocessor
It is a 8 bit microprocessor

It has 16 bit address bus and 8 bit data bus
It doesn’t support pipelining

It can access up to 64 kb memory

It can access 28 =256 i/o devices

It supports integer and decimal numbers

It can operate in single mode

It is family of x-85

It is a single block device

8085 doesn’t have an instruction queue

It doesn’t support multiprocessing

In 8085 memory space is not segmented
It is old version  
It is a 16 bit microprocessor

It has 20 bit address bus and 16 bit data bus
It supports pipelining

It can access up to 1 MB

It can access 216=65536 i/o device

It supports integer decimal and ASCII also
It can operate in two mode

It is a family of x-86

It has two block EU & IU

8086 has instruction queue

It supports multiprocessing

Its memory space is segmented  
It is a new version  

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